The use of spun-on polymer coatings, e.g. as resists for lithographic processing, has become increasingly important in semiconductor manufacture. When such coatings are spun onto substrates having topographical features, changes in the coating thickness often occur at or around the topography. In the instance of a layer of resist material, such thickness variations can, for example, cause dimensional control deviations after development since the entire coating usually receives a uniform amount of irradiation.
More recently, spun-on polymer coatings have been utilized to planarize device topography in multilayer resist processing methods and surface smoothing procedures that utilize dry etching techniques, such as are described by Adams et al., J. Electrochem Soc., Vol. 128, No. 2, 423 (1981). In such procedures, a planarizing layer is often used to smooth topographical features so that a subsequent spun-on resist coating exhibits less substantial thickness variations. Not infrequently, however, such sublayer coatings produce little or no marked improvement in resist thickness variations. It is apparent, therefore, that proper planarization techniques are necessary in order to obtain the maximum benefit from a multilayer resist processing scheme. An improved planarization technique is provided in accordance with this invention.